Documentation: riscv: fix insufficient list item indent
authorConor Dooley <conor.dooley@microchip.com>
Sun, 29 Jan 2023 23:57:01 +0000 (23:57 +0000)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 15 Feb 2023 00:00:02 +0000 (16:00 -0800)
commit2a5303b499b18de7179ee1b4ab759880fb02ec9c
treea533026a7b541542e8c2223fa5a31aff278b94c1
parent9daca9a5b9ac35361ce2d8d5ec10b19b7048d6cd
Documentation: riscv: fix insufficient list item indent

When adding the ISA string ordering rules, I didn't sufficiently indent
one of the list items.

Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/linux-doc/202301300743.bp7Dpazv-lkp@intel.com/
Fixes: f07b2b3f9d47 ("Documentation: riscv: add a section about ISA string ordering in /proc/cpuinfo")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Bagas Sanjaya <bagasdotme@gmail.com>
Link: https://lore.kernel.org/r/20230129235701.2393241-1-conor@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/riscv/uabi.rst