clk: renesas: r8a779[56]x: Add MLP clocks
authorAndrey Gusakov <andrey.gusakov@cogentembedded.com>
Wed, 29 Sep 2021 21:34:32 +0000 (00:34 +0300)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 15 Oct 2021 07:46:14 +0000 (09:46 +0200)
commit2bd9feed23166f5ab67dec2ca02bd3f74c77b0ba
tree0caf91c073ccd8c26c4b1ffce206a66aa36652e1
parent373bd6f487562e8727bc842e9983b093d57968cc
clk: renesas: r8a779[56]x: Add MLP clocks

Add clocks for MLP modules on Renesas R-Car H3 and M3-W/N SoCs.

Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Link: https://lore.kernel.org/r/20210929213431.5275-1-nikita.yoush@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a7795-cpg-mssr.c
drivers/clk/renesas/r8a7796-cpg-mssr.c
drivers/clk/renesas/r8a77965-cpg-mssr.c