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mlxsw: reg: Add QoS Switch Traffic Class Table register
authorIdo Schimmel <idosch@mellanox.com>
Wed, 6 Apr 2016 15:10:07 +0000 (17:10 +0200)
committerDavid S. Miller <davem@davemloft.net>
Wed, 6 Apr 2016 21:24:18 +0000 (17:24 -0400)
commit2c63a555e8495f3d6db443ca73094a6a3508df4a
tree215ad30ac521090da86d60de89188ff1a04f6b58tree | snapshot
parentb9b7cee405797cc395f699d8dee4747b96b1e0a8commit | diff
mlxsw: reg: Add QoS Switch Traffic Class Table register

As part of DCB ops we'll have to configure the priority to traffic class
mapping of a port.

Add the QoS Switch Traffic Class Table (QTCT) register, which configures
the mapping between the packet switch priority and traffic class on the
transmit port.

Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/reg.h diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git