target/riscv: zfh: implement zfhmin extension
authorFrank Chang <frank.chang@sifive.com>
Fri, 10 Dec 2021 07:43:26 +0000 (15:43 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Mon, 20 Dec 2021 04:51:36 +0000 (14:51 +1000)
commit2d258b428b4f61b71be823fe2a67e7a174078501
tree9018a7ff8fe046a1c319e490de4a4e06012fb975
parent13fb8c7b4252872c1b07fac5f0ea9231480c8463
target/riscv: zfh: implement zfhmin extension

Zfhmin extension is a subset of Zfh extension, consisting only of data
transfer and conversion instructions.

If enabled, only the following instructions from Zfh extension are
included:
  * flh, fsh, fmv.x.h, fmv.h.x, fcvt.s.h, fcvt.h.s
  * If D extension is present: fcvt.d.h, fcvt.h.d

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20211210074329.5775-8-frank.chang@sifive.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.h
target/riscv/insn_trans/trans_rvzfh.c.inc
target/riscv/translate.c