drm/mipi-dbi: align max_chunk to 2 in spi_transfer
authorYunhao Tian <t123yh.xyz@gmail.com>
Tue, 10 May 2022 03:02:19 +0000 (11:02 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 17 Aug 2022 12:23:17 +0000 (14:23 +0200)
commit2dc78843fe9807b6a7a92aaaa1387202f30f3f89
tree0206267d213afc4c57171970f5f66679d855a33f
parenteaff3946a86fc63280a30158a4ae1e141449817c
drm/mipi-dbi: align max_chunk to 2 in spi_transfer

[ Upstream commit 435c249008cba04ed6a7975e9411f3b934620204 ]

In __spi_validate, there's a validation that no partial transfers
are accepted (xfer->len % w_size must be zero). When
max_chunk is not a multiple of bpw (e.g. max_chunk = 65535,
bpw = 16), the transfer will be rejected.

This patch aligns max_chunk to 2 bytes (the maximum value of bpw is 16),
so that no partial transfer will occur.

Fixes: d23d4d4dac01 ("drm/tinydrm: Move tinydrm_spi_transfer()")
Signed-off-by: Yunhao Tian <t123yh.xyz@gmail.com>
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220510030219.2486687-1-t123yh.xyz@gmail.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/drm_mipi_dbi.c