clk: actions: Fix UART clock dividers on Owl S500 SoC
authorCristian Ciocaltea <cristian.ciocaltea@gmail.com>
Thu, 10 Jun 2021 20:05:21 +0000 (23:05 +0300)
committerStephen Boyd <sboyd@kernel.org>
Mon, 28 Jun 2021 01:45:16 +0000 (18:45 -0700)
commit2dca2a619a907579e3e65e7c1789230c2b912e88
tree36e9f044585ff0ed605c76b351ae459f5440b832
parent6efb943b8616ec53a5e444193dccf1af9ad627b5
clk: actions: Fix UART clock dividers on Owl S500 SoC

Use correct divider registers for the Actions Semi Owl S500 SoC's UART
clocks.

Fixes: ed6b4795ece4 ("clk: actions: Add clock driver for S500 SoC")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/4714d05982b19ac5fec2ed74f54be42d8238e392.1623354574.git.cristian.ciocaltea@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/actions/owl-s500.c