cxl/pci: Store the endpoint's Component Register mappings in struct cxl_dev_state
authorRobert Richter <rrichter@amd.com>
Wed, 18 Oct 2023 17:16:59 +0000 (19:16 +0200)
committerDan Williams <dan.j.williams@intel.com>
Sat, 28 Oct 2023 03:13:37 +0000 (20:13 -0700)
commit2dd18279202f6247904e6e23738c1ec6a86b24b1
tree96281c1fa2279abee30666658dfe77b86878a784
parent4d758764e7f9db83806135f3bfcff1ab64f16e60
cxl/pci: Store the endpoint's Component Register mappings in struct cxl_dev_state

Same as for ports and dports, also store the endpoint's Component
Register mappings, use struct cxl_dev_state for that.

Keep the Component Register base address @component_reg_phys a bit to
not break functionality. It will be removed after the transition in a
later patch.

Signed-off-by: Terry Bowman <terry.bowman@amd.com>
Signed-off-by: Robert Richter <rrichter@amd.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/20231018171713.1883517-7-rrichter@amd.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/cxl/core/mbox.c
drivers/cxl/cxlmem.h
drivers/cxl/pci.c