phy: rockchip: Support PCIe v3
authorShawn Lin <shawn.lin@rock-chips.com>
Thu, 25 Aug 2022 19:38:34 +0000 (21:38 +0200)
committerVinod Koul <vkoul@kernel.org>
Sun, 4 Sep 2022 15:05:48 +0000 (20:35 +0530)
commit2e9bffc4f713db465177238f6033f7d367d6f151
tree6c5811a02e99a37578826faebfe1bf0dfa0c59b9
parent75be98eee8d8914e469f540e12f6078f42252acc
phy: rockchip: Support PCIe v3

RK3568 supports PCIe v3 using not Combphy like PCIe v2 on rk3566.
It use a dedicated PCIe-phy. Add support for this.

Initial support by Shawn Lin, modifications by Peter Geis and Frank
Wunderlich.

Add data-lanes property for splitting pcie-lanes across controllers.

The data-lanes is an array where x=0 means lane is disabled and  x > 0
means controller x is assigned to phy lane.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Suggested-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20220825193836.54262-4-linux@fw-web.de
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/rockchip/Kconfig
drivers/phy/rockchip/Makefile
drivers/phy/rockchip/phy-rockchip-snps-pcie3.c [new file with mode: 0644]
include/linux/phy/pcie.h [new file with mode: 0644]