i2c: mlxcpld: Add support for extended transaction length
authorVadim Pasternak <vadimp@nvidia.com>
Tue, 22 Aug 2023 18:51:37 +0000 (18:51 +0000)
committerWolfram Sang <wsa@kernel.org>
Fri, 25 Aug 2023 20:13:12 +0000 (22:13 +0200)
commit2ed4fa9cb875a7720258fa25521ac67220e934b8
tree04c30752526820ef1b93092157266be1db1c3056
parentd7cf993f832ad2a4f36666512ccefb05b5612e51
i2c: mlxcpld: Add support for extended transaction length

Add support for extended length of read and write transactions.
New FPGA logic allows to increase size of the read and write
transactions length. This feature is verified through capability
register 'CPBLTY_REG'. Two bits 5 and 6 of the register are used for
length capability detection. Value '10' indicates support of extended
transaction length - 128 bytes for read transactions and 132 for write
transactions.

Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Reviewed-by: Michael Shych <michaelsh@nvidia.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
drivers/i2c/busses/i2c-mlxcpld.c