ARM: dts: Remove LPC BMC and Host partitions
authorChia-Wei, Wang <chiawei_wang@aspeedtech.com>
Fri, 19 Mar 2021 06:27:33 +0000 (16:57 +1030)
committerJoel Stanley <joel@jms.id.au>
Fri, 9 Apr 2021 04:09:20 +0000 (13:39 +0930)
commit311bf0f18cd68f55a8ffd30089ccb74a2318b86d
tree3d73f7f23d9c7f766ec6fc2e6824681ece167891
parentbaffc34d48b7a162f07cd842eeb37838612234ee
ARM: dts: Remove LPC BMC and Host partitions

The LPC controller has no concept of the BMC and the Host partitions.

A concrete instance is that the HICRB[5:4] are for the I/O port address
configurtaion of KCS channel 1/2. However, the KCS driver cannot access
HICRB for channel 1/2 initialization via syscon regmap interface due to
the parition boundary. (i.e. offset 80h)

In addition, for the HW design backward compatibility, a newly added HW
control bit could be located at any reserved one over the LPC addressing
space. Thereby, this patch removes the lpc-bmc and lpc-host child node
and thus the LPC partitioning.

Note that this change requires the synchronization between device tree
change and the driver change. To prevent the misuse of old devicetrees
with new drivers, or vice versa, the v2 compatible strings are adopted
for the LPC device as listed:

"aspeed,ast2400-lpc-v2"
"aspeed,ast2500-lpc-v2"
"aspeed,ast2600-lpc-v2"

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210319062752.145730-2-andrew@aj.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
arch/arm/boot/dts/aspeed-g4.dtsi
arch/arm/boot/dts/aspeed-g5.dtsi
arch/arm/boot/dts/aspeed-g6.dtsi