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(parent: d96a271) | patch
target/riscv: Adjust vsetvl according to XLEN
authorLIU Zhiwei <zhiwei_liu@c-sky.com>
Thu, 20 Jan 2022 12:20:43 +0000 (20:20 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Fri, 21 Jan 2022 05:52:57 +0000 (15:52 +1000)
commit31961cfe505e11cc4ec4cfde52c851957e1bf605
tree8f891b80ae6a9d3330ca2150bc601a3fb734e792tree | snapshot
parentd96a271a8daedb83247baf89349ead0cb8f0c449commit | diff
target/riscv: Adjust vsetvl according to XLEN

Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220120122050.41546-17-zhiwei_liu@c-sky.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.h diff | blob | history
target/riscv/vector_helper.c diff | blob | history
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