perf/x86/ibs: Add new IBS register bits into header
authorRavi Bangoria <ravi.bangoria@amd.com>
Sat, 4 Jun 2022 04:45:17 +0000 (10:15 +0530)
committerBorislav Petkov <bp@suse.de>
Wed, 27 Jul 2022 11:54:38 +0000 (13:54 +0200)
commit326ecc15c61c349cd49d1700ff9e3e31c6fd1cd5
tree5b0113a30a6b9c54e46019c48d06ebe9335b9db4
parentccf170e9d8fdacfe435bbe3749c897c7d86d32f8
perf/x86/ibs: Add new IBS register bits into header

IBS support has been enhanced with two new features in upcoming uarch:

  1. DataSrc extension and
  2. L3 miss filtering.

Additional set of bits has been introduced in IBS registers to use these
features. Define these new bits into arch/x86/ header.

  [ bp: Massage commit message. ]

Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Ian Rogers <irogers@google.com>
Link: https://lore.kernel.org/r/20220604044519.594-7-ravi.bangoria@amd.com
arch/x86/include/asm/amd-ibs.h