ARM: dts: dra7: Use clksel binding for CTRL_CORE_SMA_SW_0
authorTony Lindgren <tony@atomide.com>
Wed, 27 Mar 2024 07:10:37 +0000 (09:10 +0200)
committerTony Lindgren <tony@atomide.com>
Wed, 10 Apr 2024 06:15:54 +0000 (09:15 +0300)
commit32f4c19f6a52bdfa6ec73a067b6e7382b8d6653e
tree8c9f797954c72c9a13ab33bfcc32a7879cf954f9
parentbb5f690d5ebc6ea911dac0c327744f2af1ff674d
ARM: dts: dra7: Use clksel binding for CTRL_CORE_SMA_SW_0

On dra76x, most dpll_gmac output clksel clocks are in registers from
CM_CLKSEL_DPLL_GMAC to CM_DIV_H13_DPLL_GMAC. In addition to that, there
are there more clocks in the CTRL_CORE_SMA_SW_0 register.

Let's group the CTRL_CORE_SMA_SW_0 clocks using the clksel binding to
reduce make W=1 dtbs unique_unit_address warnings, and stop using the
custom the ti,bit-shift property in favor of the standard reg property.

Let's also add a comment for the CTRL_CORE_SMA_SW_0 clock that matches the
documentation.

Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/ti/omap/dra76x.dtsi