projects / qemu.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 4fd71d1) | patch
target/sparc: Add feature bits for VIS 3
authorRichard Henderson <richard.henderson@linaro.org>
Sat, 4 Nov 2023 19:21:37 +0000 (12:21 -0700)
committerRichard Henderson <richard.henderson@linaro.org>
Wed, 5 Jun 2024 16:05:10 +0000 (09:05 -0700)
commit3335a04806d337c69f44a707cdc27515d6c91d84
treef9fbfc1d70e2d389023f715b7b33f2a56f0f89f7tree | snapshot
parent4fd71d19acd6e05b74927a0b5c4a5b0650e3d6f5commit | diff
target/sparc: Add feature bits for VIS 3

The manual separates VIS 3 and VIS 3B, even though they are both
present in all extant cpus.  For clarity, let the translator
match the manual but otherwise leave them on the same feature bit.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
target/sparc/cpu-feature.h.inc diff | blob | history
target/sparc/translate.c diff | blob | history
Unnamed repository; edit this file 'description' to name the repository.