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target-sparc: add ST_BLKINIT_ ASIs for UA2005+ CPUs
authorArtyom Tarasenko <atar4qemu@gmail.com>
Wed, 2 Nov 2016 09:37:44 +0000 (10:37 +0100)
committerArtyom Tarasenko <atar4qemu@gmail.com>
Wed, 18 Jan 2017 21:03:44 +0000 (22:03 +0100)
commit3390537b5df4014e24a30f9bdcfa05c2bd0cd6d8
tree980266b3bcd1df564a797415a1e7ccf5f5b4be56tree | snapshot
parent7285fba083de3f14f6e98abb4469173b56da9480commit | diff
target-sparc: add ST_BLKINIT_ ASIs for UA2005+ CPUs

In OpenSPARC T1+ TWINX ASIs in store instructions are aliased
with Block Initializing Store ASIs.

"UltraSPARC T1 Supplement Draft D2.1, 14 May 2007" describes them
in the chapter "5.9 Block Initializing Store ASIs"

Integer stores of all sizes are allowed with these ASIs.

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
target/sparc/translate.c diff | blob | history
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