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hw/intc/armv7m_nvic: NS BFAR and BFSR are RAZ/WI if BFHFNMINS == 0
authorPeter Maydell <peter.maydell@linaro.org>
Tue, 7 May 2019 11:55:03 +0000 (12:55 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 7 May 2019 11:55:03 +0000 (12:55 +0100)
commit339327b6d4a2830cba230c6be7a17a4a2fc3d546
tree0ecf83aab5aa0e503a12f2b0eaf5c96d59cb01f5tree | snapshot
parentb01e2f0284a2df11aef990219104e3f52c317061commit | diff
hw/intc/armv7m_nvic: NS BFAR and BFSR are RAZ/WI if BFHFNMINS == 0

The non-secure versions of the BFAR and BFSR registers are
supposed to be RAZ/WI if AICR.BFHFNMINS == 0; we were
incorrectly allowing NS code to access the real values.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190430131439.25251-3-peter.maydell@linaro.org
hw/intc/armv7m_nvic.c diff | blob | history
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