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arm64: perf: Add support for Armv8.1 PMCEID register format
authorWill Deacon <will.deacon@arm.com>
Fri, 5 Oct 2018 12:28:07 +0000 (13:28 +0100)
committerWill Deacon <will.deacon@arm.com>
Wed, 21 Nov 2018 13:16:33 +0000 (13:16 +0000)
commit342e53bd8548e07c6a734d2d3a6437ad6e6d3b09
treeafafbc66fd14730b6713497135d23b2198dfc71ftree | snapshot
parentd3adeed7289220fdc78ee4400efbcd4cf1556215commit | diff
arm64: perf: Add support for Armv8.1 PMCEID register format

Armv8.1 allocated the upper 32-bits of the PMCEID registers to describe
the common architectural and microarchitecture events beginning at 0x4000.

Add support for these registers to our probing code, so that we can
advertise the SPE events when they are supported by the CPU.

Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/kernel/perf_event.c diff | blob | history
include/linux/perf/arm_pmu.h diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git