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(parent: c7b4c36) | patch
target-i386: SSE4.1: fix pinsrb instruction
authorAurelien Jarno <aurelien@aurel32.net>
Tue, 26 Mar 2013 18:56:01 +0000 (19:56 +0100)
committerAurelien Jarno <aurelien@aurel32.net>
Mon, 1 Apr 2013 16:49:15 +0000 (18:49 +0200)
commit34c6addd4b22583e7b408c0d1452eab753cbfb62
treedaf40c5d89fcfd7e8e77d3d1ae4082021adad3cbtree | snapshot
parentc7b4c36714a442ae5abd26de293cb5e967be6e12commit | diff
target-i386: SSE4.1: fix pinsrb instruction

gen_op_mov_TN_reg() loads the value in cpu_T[0], so this temporary should
be used instead of cpu_tmp0.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-i386/translate.c diff | blob | history
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