projects / linux.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 5f70540) | patch
phy: qcom-qmp: pcs-pcie: Add v6 register offsets
authorAbel Vesa <abel.vesa@linaro.org>
Wed, 8 Feb 2023 18:00:13 +0000 (20:00 +0200)
committerVinod Koul <vkoul@kernel.org>
Fri, 10 Feb 2023 16:58:00 +0000 (22:28 +0530)
commit354fc6c513ccb459a67c99a57c8d1a837358a001
tree0003dad11f28df22ac9a480325a0c31b306ea6c5tree | snapshot
parent5f705402739c87b682861f8f06751a8218f52065commit | diff
phy: qcom-qmp: pcs-pcie: Add v6 register offsets

The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB,
UFS and PCIE g3x2. Add the new PCS PCIE specific offsets in a dedicated
header file.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230208180020.2761766-5-abel.vesa@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c diff | blob | history
drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h [new file with mode: 0644] blob
ep93xx device tree rework repo: git://git.maquefel.me/linux.git