target/riscv: Enable PC-relative translation
authorWeiwei Li <liweiwei@iscas.ac.cn>
Fri, 26 May 2023 07:21:23 +0000 (15:21 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Tue, 13 Jun 2023 07:37:12 +0000 (17:37 +1000)
commit356c13f94dbff3f32e9d3615f6caa35a2a324d8d
treed42f83efda38fbf878312da3cb230820e1449de1
parent227fb82f99ac2d147c15342b2c83c7f6c28f20d2
target/riscv: Enable PC-relative translation

Add a base pc_save for PC-relative translation(CF_PCREL).
Diable the directly sync pc from tb by riscv_cpu_synchronize_from_tb.
Use gen_pc_plus_diff to get the pc-relative address.
Enable CF_PCREL in System mode.

Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230526072124.298466-7-liweiwei@iscas.ac.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c
target/riscv/insn_trans/trans_rvi.c.inc
target/riscv/insn_trans/trans_rvzce.c.inc
target/riscv/translate.c