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(parent: f9911e1) | patch
target/ppc: 405: Instruction storage interrupt cleanup
authorFabiano Rosas <farosas@linux.ibm.com>
Fri, 28 Jan 2022 12:15:05 +0000 (13:15 +0100)
committerCédric Le Goater <clg@kaod.org>
Fri, 28 Jan 2022 12:15:05 +0000 (13:15 +0100)
commit35f579f5c21682311039f84e2e81254937e6ff78
tree91036c8f6e309c90cb732b3b54d29249388315bctree | snapshot
parentf9911e1e5513ebf661ae871ae31269a9a1cfabdccommit | diff
target/ppc: 405: Instruction storage interrupt cleanup

The 405 ISI does not set SRR1 with any exception syndrome bits, only a
clean copy of the MSR.

Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
[ clg : Fixed removal which was done in the wrong routine ]
Message-Id: <20220118184448.852996-13-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
target/ppc/excp_helper.c diff | blob | history
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