KVM: PPC: Book3S HV P9: Optimise loads around context switch
authorNicholas Piggin <npiggin@gmail.com>
Sun, 23 Jan 2022 11:47:25 +0000 (21:47 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Fri, 13 May 2022 11:33:26 +0000 (21:33 +1000)
commit361234d7a1c9a5290d33e35d49821b7a32a32854
treea1aa737a6eaf5d55c1453643d01059205739f55c
parent861604614a94a7aabc111e4a18aaf5d56d270e8a
KVM: PPC: Book3S HV P9: Optimise loads around context switch

It is better to get all loads for the register values in flight
before starting to switch LPID, PID, and LPCR because those
mtSPRs are expensive and serialising.

This also just tidies up the code for a potential future change
to the context switching sequence.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220123114725.3549202-1-npiggin@gmail.com
arch/powerpc/kvm/book3s_hv_p9_entry.c