drm/msm/dpu: split interrupt address arrays

drm/msm/dpu: split interrupt address arrays

There is no point in having a single enum (and a single array) for both
DPU < 7.0 and DPU >= 7.0 interrupt registers. Instead define a single
enum and two IRQ address arrays.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Fixes: c7314613226a0 ("drm/msm: Add missing struct identifier")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/549653/
Link: https://lore.kernel.org/r/20230727144543.1483630-3-dmitry.baryshkov@linaro.org