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target/mips: Preparing for adding MMI instructions
authorMateja Marjanovic <Mateja.Marjanovic@rt-rk.com>
Tue, 26 Feb 2019 12:23:12 +0000 (13:23 +0100)
committerAleksandar Markovic <amarkovic@wavecomp.com>
Wed, 27 Feb 2019 13:26:14 +0000 (14:26 +0100)
commit37b9aae2e6e005e6df206a0b4804972460806166
treec5d4f110b375bf091d26bbb11595132138fda2d9tree | snapshot
parent1e6bea794c8ac7e53ce18a9141367e4c91fb59a2commit | diff
target/mips: Preparing for adding MMI instructions

Set up MMI code to be compiled only for TARGET_MIPS64. This is
needed so that GPRs are 64 bit, and combined with MMI registers,
they will form full 128 bit registers.

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551183797-13570-2-git-send-email-mateja.marjanovic@rt-rk.com>
target/mips/translate.c diff | blob | history
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