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(parent: 2179ef9) | patch
target-arm: Implement missing AFSR registers
authorPeter Maydell <peter.maydell@linaro.org>
Tue, 25 Aug 2015 14:45:07 +0000 (15:45 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 25 Aug 2015 14:45:07 +0000 (15:45 +0100)
commit37cd6c2478196623ca28526627ca8c69afe0d654
tree70936c8a5552a9dbfb60b35789ae8caeb2e493f3tree | snapshot
parent2179ef958c81480b841ffa0aab5e265688ffd2b0commit | diff
target-arm: Implement missing AFSR registers

The AFSR registers are implementation dependent auxiliary fault
status registers. We already implemented a RAZ/WI AFSR0_EL1 and
AFSR_EL1; add the missing AFSR{0,1}_EL{2,3} for consistency.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1438281398-18746-4-git-send-email-peter.maydell@linaro.org
target-arm/helper.c diff | blob | history
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