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(parent: 7c032bf) | patch
hw/mips/gt64xxx_pci: Let the GT64120 manage the lower 512MiB hole
authorPhilippe Mathieu-Daudé <f4bug@amsat.org>
Tue, 2 Mar 2021 22:42:56 +0000 (23:42 +0100)
committerPhilippe Mathieu-Daudé <philmd@linaro.org>
Fri, 13 Jan 2023 08:32:32 +0000 (09:32 +0100)
commit37e506b69a6791bede30677f05081296f3b77f77
treede58b757842eda91dc316bd38399de2e55c7ff3ctree | snapshot
parent7c032bfbe838c24dcbdc8f9c452553b24f20daadcommit | diff
hw/mips/gt64xxx_pci: Let the GT64120 manage the lower 512MiB hole

Per the comment in the Malta board, the [0x0000.0000-0x2000.0000]
range is decoded by the GT64120, so move the "empty_slot" there.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20221209151533.69516-3-philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
configs/devices/mips-softmmu/common.mak diff | blob | history
hw/mips/Kconfig diff | blob | history
hw/mips/gt64xxx_pci.c diff | blob | history
hw/mips/malta.c diff | blob | history
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