target/riscv: add ssu64xl
authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>
Wed, 15 Jan 2025 18:43:11 +0000 (15:43 -0300)
committerAlistair Francis <alistair.francis@wdc.com>
Tue, 4 Mar 2025 05:42:54 +0000 (15:42 +1000)
commit38d0ce28dfc7a73c7527442bb3b7029b402cb056
treea883bcfd552b1ac49e80189371cc2de274d56368
parenta680d9531e9b3726dddee94e5f49900c4b756ea6
target/riscv: add ssu64xl

ssu64xl is defined in RVA22 as:

"sstatus.UXL must be capable of holding the value 2 (i.e., UXLEN=64 must
be supported)."

This is always true in TCG and it's mandatory for RVA23, so claim
support for it.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250115184316.2344583-2-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c
tests/data/acpi/riscv64/virt/RHCT