RISC-V: KVM: add vector registers and CSRs in KVM_GET_REG_LIST
authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>
Tue, 5 Dec 2023 17:45:09 +0000 (14:45 -0300)
committerAnup Patel <anup@brainfault.org>
Fri, 29 Dec 2023 07:01:56 +0000 (12:31 +0530)
commit3975525e554559117bbf569239c8b41f2c2fa5cf
treec802021065f741fbdbb8e219efea6b3e098befa9
parent2fa290372dfe7dd248b1c16f943f273a3e674f22
RISC-V: KVM: add vector registers and CSRs in KVM_GET_REG_LIST

Add all vector registers and CSRs (vstart, vl, vtype, vcsr, vlenb) in
get-reg-list.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/kvm/vcpu_onereg.c