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(parent: 36f6965) | patch
Fix BD flag handling, cause register contents, implement some more bits
authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Sun, 18 Mar 2007 12:43:40 +0000 (12:43 +0000)
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Sun, 18 Mar 2007 12:43:40 +0000 (12:43 +0000)
commit39d51eb8bcc603c02342d8f5e1f7a569e5f17e06
tree3036073718e3ba76bc3143261d6caee489d03538tree | snapshot
parent36f696517b1723d627b79aa924bac7c678de01b0commit | diff
Fix BD flag handling, cause register contents, implement some more bits
for R2 interrupt handling.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2493 c046a42c-6fe2-441c-8c8c-71466251a162
hw/mips_int.c diff | blob | history
hw/mips_timer.c diff | blob | history
target-mips/helper.c diff | blob | history
target-mips/op.c diff | blob | history
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