arm64: errata: Add Cortex-A510 to the repeat tlbi list
authorJames Morse <james.morse@arm.com>
Mon, 4 Jul 2022 15:57:32 +0000 (16:57 +0100)
committerWill Deacon <will@kernel.org>
Tue, 5 Jul 2022 11:26:41 +0000 (12:26 +0100)
commit39fdb65f52e9a53d32a6ba719f96669fd300ae78
treef94f7ac26d28fb0cfd1283f9ea3dac4de1cef6be
parenta111daf0c53ae91e71fd2bfe7497862d14132e3e
arm64: errata: Add Cortex-A510 to the repeat tlbi list

Cortex-A510 is affected by an erratum where in rare circumstances the
CPUs may not handle a race between a break-before-make sequence on one
CPU, and another CPU accessing the same page. This could allow a store
to a page that has been unmapped.

Work around this by adding the affected CPUs to the list that needs
TLB sequences to be done twice.

Signed-off-by: James Morse <james.morse@arm.com>
Link: https://lore.kernel.org/r/20220704155732.21216-1-james.morse@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Documentation/arm64/silicon-errata.rst
arch/arm64/Kconfig
arch/arm64/kernel/cpu_errata.c