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target/riscv: Declare RISCVCPUClass::misa_mxl_max as RISCVMXL
authorPhilippe Mathieu-Daudé <philmd@linaro.org>
Mon, 10 Feb 2025 09:11:16 +0000 (10:11 +0100)
committerPhilippe Mathieu-Daudé <philmd@linaro.org>
Thu, 6 Mar 2025 14:46:18 +0000 (15:46 +0100)
commit3bbcc0f732a173f164628243c6345b659c08900d
tree184706c819b5ea941aa252544ceba17b219ae1catree | snapshot
parent05769aae6288a69ba04b0162ed0a15b08b2b7878commit | diff
target/riscv: Declare RISCVCPUClass::misa_mxl_max as RISCVMXL

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250210133134.90879-5-philmd@linaro.org>
target/riscv/cpu.c diff | blob | history
target/riscv/cpu.h diff | blob | history
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