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(parent: 2965491) | patch
drm/xe: add GSCCS irq support
authorDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Thu, 17 Aug 2023 20:18:27 +0000 (13:18 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 21 Dec 2023 16:40:20 +0000 (11:40 -0500)
commit3d2b5d4e28d9c58ea97704fe1eb663aee2556449
tree6110f77e0ae60f0b585e893c9842de27d9797484tree | snapshot
parent296549107e4766bb927debd016527c71fb6faf36commit | diff
drm/xe: add GSCCS irq support

The GSCCS has its own enable and mask registers. The interrupt identity
for the GSCCS shows OTHER_CLASS instance 6.

Bspec: 54029, 54030
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20230817201831.1583172-4-daniele.ceraolospurio@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/regs/xe_gt_regs.h diff | blob | history
drivers/gpu/drm/xe/xe_irq.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git