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(parent: 6203815) | patch
clk: mediatek: Add MT8195 apmixedsys clock support
authorChun-Jie Chen <chun-jie.chen@mediatek.com>
Tue, 14 Sep 2021 02:16:15 +0000 (10:16 +0800)
committerStephen Boyd <sboyd@kernel.org>
Tue, 14 Sep 2021 22:05:37 +0000 (15:05 -0700)
commit3e9121f16cb3f4f93ad7c41a644ba384d13c2945
tree0d8793a80926fbd5bc7a497c46221168eb1c690atree | snapshot
parent6203815bf97eeaa78ca2e47758f0232043e69ba7commit | diff
clk: mediatek: Add MT8195 apmixedsys clock support

Add MT8195 apmixedsys clock controller which provides Plls
generated from SoC 26m and ssusb clock gate control.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210914021633.26377-7-chun-jie.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/mediatek/Kconfig diff | blob | history
drivers/clk/mediatek/Makefile diff | blob | history
drivers/clk/mediatek/clk-mt8195-apmixedsys.c [new file with mode: 0644] blob
ep93xx device tree rework repo: git://git.maquefel.me/linux.git