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target/mips/mxu: Add S8STD S8LDI S8SDI instructions
authorSiarhei Volkau <lis8215@gmail.com>
Thu, 8 Jun 2023 10:42:09 +0000 (13:42 +0300)
committerPhilippe Mathieu-Daudé <philmd@linaro.org>
Mon, 10 Jul 2023 21:33:38 +0000 (23:33 +0200)
commit3f0e94c1348d29451db94fb0ebdbaf6fdda1c730
tree07b2d7df870f9fddee0e07f5c018e1edcc5c364etree | snapshot
parenteb79951ab638ba84ef424a8f7c0929cd4a5ea53dcommit | diff
target/mips/mxu: Add S8STD S8LDI S8SDI instructions

These instructions are all load/store a byte from memory
and put it into/get it from MXU register in various combinations.
I-suffix instructions modify the base address GPR by offset provided.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Message-Id: <20230608104222.1520143-21-lis8215@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
target/mips/tcg/mxu_translate.c diff | blob | history
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