projects / qemu.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 5d47919) | patch
nvic: Make ICSR banked for v8M
authorPeter Maydell <peter.maydell@linaro.org>
Tue, 12 Sep 2017 18:14:04 +0000 (19:14 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 21 Sep 2017 15:31:09 +0000 (16:31 +0100)
commit3f1e0eb7c38c19bd2a4bfa8398921d29a1080249
treeefe8fdcdd6aa3a1f12fe8a7b884dd9b1e60fc206tree | snapshot
parent5d4791991d4de12e83d44738417c9e964167b6e8commit | diff
nvic: Make ICSR banked for v8M

The ICSR NVIC register is banked for v8M. This doesn't
require any new state, but it does mean that some bits
are controlled by BFHNFNMINS and some bits must work
with the correct banked exception. There is also a new
in v8M PENDNMICLR bit.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1505240046-11454-18-git-send-email-peter.maydell@linaro.org
hw/intc/armv7m_nvic.c diff | blob | history
Unnamed repository; edit this file 'description' to name the repository.