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(parent: d05e66d) | patch
pop ss, mov ss, x and sti disable irqs for the next instruction - began dispatch...
authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>
Wed, 20 Aug 2003 23:02:09 +0000 (23:02 +0000)
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>
Wed, 20 Aug 2003 23:02:09 +0000 (23:02 +0000)
commit3f3373166227b13e762e20d2fb51eadfa6a2d653
tree61211017f0428c56b245c36b357aa0e2de4ec91etree | snapshot
parentd05e66d217f8f83487c3b1d3015a67316b47645fcommit | diff
pop ss, mov ss, x and sti disable irqs for the next instruction - began dispatch optimization by adding new x86 cpu 'hidden' flags

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@372 c046a42c-6fe2-441c-8c8c-71466251a162
cpu-exec.c diff | blob | history
cpu-i386.h diff | blob | history
exec.h diff | blob | history
helper-i386.c diff | blob | history
helper2-i386.c diff | blob | history
op-i386.c diff | blob | history
softmmu_template.h diff | blob | history
translate-i386.c diff | blob | history
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