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target-mips: fix xtlb exception for loongson
authorAurelien Jarno <aurelien@aurel32.net>
Thu, 15 Jul 2010 21:13:11 +0000 (23:13 +0200)
committerAurelien Jarno <aurelien@aurel32.net>
Sat, 17 Jul 2010 14:13:12 +0000 (16:13 +0200)
commit3fc00a7bdeffd26932c4f27a6bc4f902f86fbbe9
tree6f76540af5b29d7bfc8ea1de5ffa92fe61587d19tree | snapshot
parent08218b3527301760393b0b4ec732fcdfb7ff6cdacommit | diff
target-mips: fix xtlb exception for loongson

Loongson 2E and 2F use the same entry for xtlb and tlb exception, at
offset 0x000.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-mips/helper.c diff | blob | history
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