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net/mlx5e: Fix endianness handling in pedit mask
authorSebastian Hense <sebastian.hense1@ibm.com>
Thu, 20 Feb 2020 07:11:36 +0000 (08:11 +0100)
committerSaeed Mahameed <saeedm@mellanox.com>
Thu, 5 Mar 2020 23:13:42 +0000 (15:13 -0800)
commit404402abd5f90aa90a134eb9604b1750c1941529
tree9ef7bb2ff22bf4163d6b033c5c0546f3db6a19fatree | snapshot
parentf28ca65efa87b3fb8da3d69ca7cb1ebc0448de66commit | diff
net/mlx5e: Fix endianness handling in pedit mask

The mask value is provided as 64 bit and has to be casted in
either 32 or 16 bit. On big endian systems the wrong half was
casted which resulted in an all zero mask.

Fixes: 2b64beba0251 ("net/mlx5e: Support header re-write of partial fields in TC pedit offload")
Signed-off-by: Sebastian Hense <sebastian.hense1@ibm.com>
Reviewed-by: Roi Dayan <roid@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git