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perf, x86: Add Nehalem programming quirk to Westmere
authorPeter Zijlstra <a.p.zijlstra@chello.nl>
Mon, 29 Mar 2010 14:37:17 +0000 (16:37 +0200)
committerIngo Molnar <mingo@elte.hu>
Fri, 2 Apr 2010 17:52:06 +0000 (19:52 +0200)
commit40b91cd10f000b4c4934e48e2e5c0bec66def144
treea37523a26b5d50c156f0f33842ed6666c4e3c753tree | snapshot
parentcaaa8be3b6707cb9664e573a28b00f845ce9f32ecommit | diff
perf, x86: Add Nehalem programming quirk to Westmere

According to the Xeon-5600 errata the Westmere suffers the same PMU
programming bug as the original Nehalem did.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
arch/x86/kernel/cpu/perf_event_intel.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git