RISC-V: Adding XTheadBb ISA extension
authorChristoph Müllner <christoph.muellner@vrull.eu>
Tue, 31 Jan 2023 20:20:03 +0000 (21:20 +0100)
committerAlistair Francis <alistair.francis@wdc.com>
Mon, 6 Feb 2023 22:19:23 +0000 (08:19 +1000)
commit426c049196efcdfc57511f779ec0416dd95a9cce
tree02eb44573d762c49f4b55c2c3a50486dfd0128ce
parentc9410a689f9f8c79378bd6d806bac3495b1eb856
RISC-V: Adding XTheadBb ISA extension

This patch adds support for the XTheadBb ISA extension.
The patch uses the T-Head specific decoder and translation.

Co-developed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Message-Id: <20230131202013.2541053-5-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c
target/riscv/cpu.h
target/riscv/insn_trans/trans_xthead.c.inc
target/riscv/translate.c
target/riscv/xthead.decode