arm64: dts: hi3798cv200: fix the size of GICR
authorYang Xiwen <forbidden405@outlook.com>
Mon, 19 Feb 2024 15:05:26 +0000 (23:05 +0800)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Mon, 8 Apr 2024 07:26:20 +0000 (09:26 +0200)
commit428a575dc9038846ad259466d5ba109858c0a023
tree96c89e4b1de1b407c5eaf19b1fe7677412379ea2
parentf0c31febdaa7046b9652fe66da901b8bc0e9e828
arm64: dts: hi3798cv200: fix the size of GICR

During boot, Linux kernel complains:

[    0.000000] GIC: GICv2 detected, but range too small and irqchip.gicv2_force_probe not set

This SoC is using a regular GIC-400 and the GICR space size should be
8KB rather than 256B.

With this patch:

[    0.000000] GIC: Using split EOI/Deactivate mode

So this should be the correct fix.

Fixes: 2f20182ed670 ("arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board")
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20240219-cache-v3-1-a33c57534ae9@outlook.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi