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arm64: dts: ti: k3-am62a7: Correct L2 cache size to 512KB
authorVignesh Raghavendra <vigneshr@ti.com>
Mon, 20 Mar 2023 04:49:35 +0000 (10:19 +0530)
committerNishanth Menon <nm@ti.com>
Mon, 20 Mar 2023 17:34:25 +0000 (12:34 -0500)
commit438b8dc949bf45979c32553e96086ff1c6e2504e
tree148e605ae682298a76f58c71395fb77aceae0bd4tree | snapshot
parent6974371cab1c488a53960945cb139b20ebb5f16bcommit | diff
arm64: dts: ti: k3-am62a7: Correct L2 cache size to 512KB

Per AM62Ax SoC datasheet[0] L2 cache is 512KB.

[0] https://www.ti.com/lit/gpn/am62a7 Page 1.

Fixes: 5fc6b1b62639 ("arm64: dts: ti: Introduce AM62A7 family of SoCs")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230320044935.2512288-2-vigneshr@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm64/boot/dts/ti/k3-am62a7.dtsi diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git