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(parent: 8ee0fea) | patch
drm/amd/display: fix dcn3+ bw validation soc param update sequence
authorDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Wed, 17 Feb 2021 16:32:10 +0000 (11:32 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 24 Mar 2021 03:33:32 +0000 (23:33 -0400)
commit443dfba02483872384354bc0e62c656e3f82b6a9
treebc02acaee8c12fb6877b2dda26c06793e7c340eatree | snapshot
parent8ee0fea4baf90e43efe2275de208a7809f9985bccommit | diff
drm/amd/display: fix dcn3+ bw validation soc param update sequence

SOC needs to be updated to the WM set A values before validation
happens.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c diff | blob | history
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.h diff | blob | history
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c diff | blob | history
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c diff | blob | history
drivers/gpu/drm/amd/display/dc/inc/core_types.h diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git