arm64: dts: marvell: cn9130: enable CP0 GPIO controllers
authorRobert Marko <robert.marko@sartura.hr>
Fri, 12 Nov 2021 13:44:03 +0000 (14:44 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 27 Jan 2022 10:03:41 +0000 (11:03 +0100)
commit4518f459c2c0fc30ba1c4a6c973b345a8524d062
tree9371744d277b1aca2a39f463226bc8e5f7bc5ddf
parent864ac5f6bfbe7d2870d5b02e2f2c5ad2e1bd9296
arm64: dts: marvell: cn9130: enable CP0 GPIO controllers

[ Upstream commit 0734f8311ce72c9041e5142769eff2083889c172 ]

CN9130 has a built-in CP115 which has 2 GPIO controllers, but unlike in
Armada 7k and 8k both are left disabled by the SoC DTSI.

This first of all makes no sense as they are always present due to being
SoC built-in and its an issue as boards like CN9130-CRB use the CPO GPIO2
pins for regulators and SD card support without enabling them first.

So, enable both of them like Armada 7k and 8k do.

Fixes: 6b8970bd8d7a ("arm64: dts: marvell: Add support for Marvell CN9130 SoC support")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/marvell/cn9130.dtsi