tcg: Add RISC-V cpu signal handler
authorAlistair Francis <Alistair.Francis@wdc.com>
Wed, 19 Dec 2018 19:19:59 +0000 (19:19 +0000)
committerRichard Henderson <richard.henderson@linaro.org>
Tue, 25 Dec 2018 19:40:02 +0000 (06:40 +1100)
commit464e447a0c4fbda2c5adce9a1b0f96800648a36f
treec03ce2cd1dcd634bb656bbd37caea521bf28e8b0
parent7a5549f2aea84bf8c71c6eaa438b4bb84e9ad967
tcg: Add RISC-V cpu signal handler

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <c445175310fa836b61fd862a55628907f0093194.1545246859.git.alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
accel/tcg/user-exec.c