hw/riscv: Move sifive_gpio model to hw/gpio
authorBin Meng <bin.meng@windriver.com>
Thu, 3 Sep 2020 10:40:15 +0000 (18:40 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Wed, 9 Sep 2020 22:54:19 +0000 (15:54 -0700)
commit4921a0ce86cecd03e6918832673db79de62e6fe1
tree5da8decc3b08809b7f5fdaddedb25d5e43fd8166
parent0fa9e329454aaccc6dbb6a4f52ad0c88a060a3b6
hw/riscv: Move sifive_gpio model to hw/gpio

This is an effort to clean up the hw/riscv directory. Ideally it
should only contain the RISC-V SoC / machine codes plus generic
codes. Let's move sifive_gpio model to hw/gpio directory.

Note this also removes the trace-events in the hw/riscv directory,
since gpio is the only supported trace target in that directory.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1599129623-68957-5-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
14 files changed:
hw/gpio/Kconfig
hw/gpio/meson.build
hw/gpio/sifive_gpio.c [new file with mode: 0644]
hw/gpio/trace-events
hw/riscv/Kconfig
hw/riscv/meson.build
hw/riscv/sifive_gpio.c [deleted file]
hw/riscv/trace-events [deleted file]
hw/riscv/trace.h [deleted file]
include/hw/gpio/sifive_gpio.h [new file with mode: 0644]
include/hw/riscv/sifive_e.h
include/hw/riscv/sifive_gpio.h [deleted file]
include/hw/riscv/sifive_u.h
meson.build