arm64: dts: ti: k3-j721s2-main: Add Itap Delay Value For DDR50 speed mode
authorBhavya Kapoor <b-kapoor@ti.com>
Fri, 1 Dec 2023 08:20:44 +0000 (13:50 +0530)
committerNishanth Menon <nm@ti.com>
Fri, 15 Dec 2023 16:05:58 +0000 (10:05 -0600)
commit4a52a8208568a85b0d51e5ca81be5925973ef108
treefb503d5b88899ba41b8727ae2fc8a317dfe05fab
parent908999561b4340089896b89cef51dae07fc001cb
arm64: dts: ti: k3-j721s2-main: Add Itap Delay Value For DDR50 speed mode

DDR50 speed mode is enabled for MMCSD in J721s2 but its Itap Delay
Value is not present in the device tree. Thus, add Itap Delay Value
for MMCSD High Speed DDR which is DDR50 speed mode for J721s2 SoC
according to datasheet for J721s2.

[+] Refer to : section 7.10.5.17.2 MMC1/2 - SD/SDIO Interface,  in
J721s2 datasheet
- https://www.ti.com/lit/ds/symlink/tda4vl-q1.pdf

Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Reviewed-by: Judith Mendez <jm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20231201082045.790478-3-b-kapoor@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi