KVM: riscv: selftests: Add a test for counter overflow
authorAtish Patra <atishp@rivosinc.com>
Sat, 20 Apr 2024 15:17:39 +0000 (08:17 -0700)
committerAnup Patel <anup@brainfault.org>
Fri, 26 Apr 2024 07:44:12 +0000 (13:14 +0530)
commit4ace2573d13ee22ebc5bb90efca6c2c9b27b2ef8
tree32b11eb546b69a21b2be2e2343411fcdc823e5f7
parent13cb706e28d9d4d3259954eb08c57b990e4429ea
KVM: riscv: selftests: Add a test for counter overflow

Add a test for verifying overflow interrupt. Currently, it relies on
overflow support on cycle/instret events. This test works for cycle/
instret events which support sampling via hpmcounters on the platform.
There are no ISA extensions to detect if a platform supports that. Thus,
this test will fail on platform with virtualization but doesn't
support overflow on these two events.

Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-24-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
tools/testing/selftests/kvm/riscv/sbi_pmu_test.c