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target/arm: Convert T32 coprocessor insns to decodetree
authorPeter Maydell <peter.maydell@linaro.org>
Mon, 3 Aug 2020 11:18:48 +0000 (12:18 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 24 Aug 2020 09:15:08 +0000 (10:15 +0100)
commit4c498dcfd84281f20bd55072630027d1b3c115fd
tree72ea9c8100a6c4070fd343db2dc0ee90a24fecfdtree | snapshot
parenta3494d4671797c291c88bd414acb0aead15f7239commit | diff
target/arm: Convert T32 coprocessor insns to decodetree

Convert the T32 coprocessor instructions to decodetree.
As with the A32 conversion, this corrects an underdecoding
where we did not check that MRRC/MCRR [24:21] were 0b0010
and so treated some kinds of LDC/STC and MRRC/MCRR rather
than UNDEFing them.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200803111849.13368-7-peter.maydell@linaro.org
target/arm/t32.decode diff | blob | history
target/arm/translate.c diff | blob | history
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