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Sparc32: dummy implementation of MXCC MMU breakpoint registers
authorBlue Swirl <blauwirbel@gmail.com>
Sat, 18 Jun 2011 20:27:05 +0000 (20:27 +0000)
committerBlue Swirl <blauwirbel@gmail.com>
Sun, 26 Jun 2011 18:25:09 +0000 (18:25 +0000)
commit4d2c2b77f3d0c59642dd2ce799a0fb4c2a91aca8
tree5d4c3ab00b8f2beb54cabf241f4d5e3d0bd82049tree | snapshot
parentaf2be2077734e0ebfc8afbe6caf0f89a1474eef2commit | diff
Sparc32: dummy implementation of MXCC MMU breakpoint registers

Add dummy registers for SuperSPARC MXCC MMU counter breakpoints, save
and load all MXCC registers.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-sparc/cpu.h diff | blob | history
target-sparc/machine.c diff | blob | history
target-sparc/op_helper.c diff | blob | history
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